1. Field of the Invention
The present invention relates generally to a control circuit of a liquid crystal display device, and more particularly to a liquid crystal display control circuit which makes high-speed response possible by adding a correction value to the cell drive voltage to effect drive compensation and which, furthermore, has a simplified circuit configuration for drive compensation.
2. Description of the Related Arts
Liquid crystal display devices have spread widely as energy-saving and space saving display devices. From use in prior arts as display devices displaying the still images of computers, there have, in recent years, been proposals for use as display devices used for televisions to display moving images.
The liquid crystal display panel has a source electrode to which a display drive voltage according to display data is applied, a gate electrode driven at scan timing and, provided at their cross position, a cell transistor and pixel electrodes. Via the cell transistor, the display drive voltage is applied to the liquid crystal layer between the pixel electrodes to change the transmittance of the liquid crystal layer whereby the desired image display is carried out.
In the case of using a liquid crystal display panel as a display device for television, it is necessary, for example, to display 60 image frames in 1 second and on account of this it is necessary to complete the change in transmittance of the liquid crystal layer within the period of one frame, which is approximately 16 msec. Applying the display drive voltage on the source electrode and applying the same voltage between the pixel electrodes within the period of 1 frame can be performed comparatively easily, but it may be difficult, depending on the displayed image, to completely change the optical characteristics (for example the transmittance) of the liquid crystal layer within the period of 1 frame. For example, a comparatively long time is necessary in order to change from the condition of a black display of zero transmittance to the condition of an intermediate color display of 25% transmittance.
Although depending on the response characteristics of the liquid crystal material, in the case where liquid crystal materials having poor response characteristics are used, there are difficulties in changing from the condition of zero transmittance to the condition of 25% transmittance within the period of 1 frame. Furthermore, depending on the liquid crystal material, there are cases where the response time to change from the condition of zero transmittance to a certain degree of transmittance is longer than the response time to change from the condition of 25% transmittance to a greater transmittance. Or, there is the same problem in the case of changing the transmittance in the opposite of the direction.
A compensation drive method is being proposed as a method to compensate for the slowness of the response characteristics of these kinds of liquid crystal materials. In this method, considering the post drive state of the previous frame and the drive level of the current frame are considered, the most suitable drive level for the liquid crystal layer to be able to complete a change in transmittance within the period of one frame is calculated, and the voltage of that drive level is applied to the pixel electrodes. For example, in the case of changing a condition of zero transmittance at the previous frame period to 50% transmittance at the present frame, the pixel electrodes are driven not by a drive level voltage corresponding to a transmittance of 50%, but by a higher drive level voltage than that. As a result, even though the response characteristics of the liquid crystal layer is slow, the response of the liquid crystal layer to the higher drive voltage becomes faster and it is possible to change to the targeted transmittance state within 1 frame period. This is also the same in the case of changing from a state of high transmittance to a state of low transmittance.
It is necessary to provide a display drive data generation circuit in the control circuit of a liquid crystal display device that converts input image data into drive data for display for the purpose of performing the drive compensation. The display drive data generation circuit forms, by means of calculation, the compensated display drive data of the input image data of the current frame and the post-drive status data of the previous frame. The calculation involved is complicated and if it is executed by a special logic circuit the calculation circuit becomes more complicated and yields an increase in cost of the liquid crystal display device.
Therefore the provision of a conversion table in the display drive data generation circuit, which can directly find the display drive data, can be considered. However, the concerned conversion table needs a comparatively high cost circuit such as an SRAM which is capable of being accessed with high-speed and the conversion table itself also becomes the cause of an increase in cost of the liquid crystal display device.
It is therefore the object of the present invention is to provide a control circuit of a liquid crystal display device that performs drive compensation at a reduced cost.
Another object of the present invention is to provide a liquid crystal display control circuit that can have a more simple display drive data generation circuit for drive compensation.
In order to achieve the objects, a first aspect of the present invention has, in a control circuit of a liquid crystal display device, a display drive data generation unit which generates display drive data from an image data of a current frame and an image data of a previous frame, and said display drive data generation unit has a conversion table that stores the display drive data or their correction values, corresponding to combinations of the image data of the current frame and the image data of the previous frame. Furthermore, the conversion table stores display drive data or their correction values corresponding to combinations of the upper bits of the current frame image data and the upper bits of the previous frame image data so that the size of this conversion table is made smaller. Furthermore, the display drive data generation unit has an interpolation calculation unit that calculates, in accordance with the lower bits of the current frame image data, the display drive data or their correction values, corresponding to the lower bits, by means of an interpolation calculation, from a plurality of contiguous display drive data or their correction values read out from the conversion table. Thus, in the case where the interpolation calculation unit calculates the correction values, it has a drive level calculation unit that corrects the current frame image data in accordance with the calculated correction value to generate the display drive data. The display drive data is provided to a source driver and a drive voltage, corresponding to the display drive data, is applied to the pixel electrodes through the source electrode and cell transistor.
According to the above control circuit, since the drive data for display or their correction values are stored in correspondence with the combination of the upper bits of the current frame image data and the upper bits of the previous frame image data, the capacity of the high-speed memory circuit that stores the conversion table can be reduced. Accompanying the reduction in the capacity of the conversion table, since the precision of the display drive data or their correction values becomes lower, an interpolation circuit is provided and, by means of an interpolation calculation the display, drive data or their correction values having increased precision is generated and consequently the input image data is corrected to generate the display drive data.